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Yearly News Archive:

Thursday 20 November 2014

Helic and Solarflare sign multi-year EDA licensing agreement


Helic Inc., proudly announces a multi-year collaboration with Solarflare Communications, Inc. the leading provider of application-intelligent networking I/O software and hardware in high-performance, low-latency 10/40GbE server networking solutions.



Tuesday 28 May 2013

Helic announces availability of 20nm and 16nm parametric inductors for high-speed & RF applications

Unique inductor IP paves the way for RF and multi-gigabit transceivers at 20/16nm

Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design, announces today the availability of an IP library for spiral inductors at the 20 nanometer (nm) and 16nm technology nodes. The inductor library is already being used by a major semiconductor company in production design.



Thursday 05 July 2012

Helic partners with Advanced Semiconductor Technology in Israel


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design proudly announces that Advanced Semiconductor Technology (AST) Ltd., the leading EDA tool and ASIC solutions provider to the Israeli market, is the exclusive representative of Helic’s product portfolio in Israel.



Thursday 14 June 2012

ANADIGICS and Helic sign multi-year renewal


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design proudly announces that ANADIGICS, Inc. selected Helic’s VeloceRF™ and VeloceRaptor/X™ to be part of their RFIC design flow.



Friday 01 June 2012

Helic releases its VeloceRF™ inductor synthesis EDA tool for iPad® and iPhone®


Helic Inc., the technology leader in Electronic Design Automation (EDA) solutions for RF and high-speed IC design, announces the availability of its VeloceRF™ tool for Apple's iPad® and iPhone®. VeloceRF is an industry-acclaimed tool providing rapid modeling and synthesis of integrated inductors and transformers, with signoff accuracy for electromagnetic effects such as mutual inductance, skin effect and substrate losses.



Tuesday 29 May 2012

Helic co-organizes DAC 2012 Workshop on CMOS Design at 60 GHz


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design is proud to organize a joint workshop with TSMC, the world’s largest dedicated semiconductor foundry. This insightful event will take place during the 2012 Design Automation Conference, at San Francisco Moscone Center, on Sunday, June 3rd, 2012, 8:30am-12:30pm.



Wednesday 09 May 2012

Helic’s VeloceRF™ in Nanoradio’s arsenal


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design announced today that Nanoradio, Inc., one of the fastest growing semiconductor companies in Sweden, selected Helic’s VeloceRF™ to be part of their RFIC design flow.



Thursday 22 March 2012

Helic sponsors IEEE CICC Student Scholarship Award


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design, was a proud sponsor of the Student Scholarship Award at the 2011 IEEE Custom Integrated Circuits Conference (CICC) in Silicon Valley.



Wednesday 30 November 2011

Elipse Engineering adopts Helic’s design tools and methodology


Helic Inc., the technology leader in EDA solutions for high-speed IC design and Elipse Engineering, a subsidiary of Elbatech Ltd. Group specializing in engineering design services for the aerospace, defence and civilian industries, announce the integration of Helic’s VeloceRF™ and VeloceRaptor/X™ into Elipse’s RFIC design flow.



Thursday 03 November 2011

Scintera Networks and Helic sign multiyear agreement


Helic Inc., the technology leader in EDA solutions for high-speed IC design and Scintera Networks, Inc., a leading provider of mixed signal semiconductors for wireless communications announce a multiyear partnership, with the integration of Helic’s VeloceRF™ and VeloceRaptor/X™ in Scintera’s RFIC design flow.



Monday 03 October 2011

Helic to present and exhibit at the 1st TSMC Open Innovation Platform® Ecosystem Forum


Helic to present and exhibit at the 1st TSMC Open Innovation Platform® Ecosystem Forum



Thursday 07 July 2011

Asahi Kasei Microdevices selects Helic’s tools for their advanced RF and AMS design flow


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design proudly announces that Asahi Kasei Microdevices selected Helic’s VeloceRF™ and VeloceRaptor/X™ to be part of their RFIC design flow



Tuesday 21 June 2011

Helic to organize conference for young engineers and scientists in Greece


Helic Inc., the technology leader in EDA solutions for RF and high-speed IC design, with the cooperation of Patras Science Park, is organizing a conference with the following subject: “Presentation of HELIC and career opportunities for young scientists”.
The conference will be held on Friday, July 8th, 2011, from 10.30 to 14.00 in the first floor conference hall of the Patras Science Park (Stadiou Str., Platani, 26504, Patras). Professors Constantine Goutis of the Electrical and Computer Engineering Department and George Alexiou of the Computer Engineering and Informatics Department, of University of Patras will give presentations.
The conference is open to undergraduate and postgraduate students, and to young scientists (free entrance). A reception will follow in the second floor foyer of the Patras Science Park.

Confirm your participation via LinkedIn or Facebook.

For Helic Inc. conference schedule, please follow this link.

Directions to the Patras Science Park, can be found here.




Friday 03 June 2011

Freescale Semiconductor selects Helic’s tools for RF IC design flow


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design proudly announces that FREESCALE SEMICONDUCTOR selected Helic’s VeloceRF™ and VeloceRaptor/X™ to be part of their RFIC design flow.



Tuesday 31 May 2011

Helic EDA Solutions in TSMC RF Reference Design Kit 3.0


Helic Inc., the technology leader in synthesis and verification solutions for RF and high-speed IC design, today announced the TSMC RF Reference Design Kit 3.0 (RF RDK) incorporates its EDA products for EM modeling and RF substrate noise coupling analysis.



Tuesday 31 May 2011

Helic’s EDA tools greatly contributed to successful development of SHARP’s RF IC


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design and SHARP CORP., proudly announce that SHARP selected Helic’s VeloceRF™, VeloceRaptor/X™ and VeloceWired® to be part of their RFIC design flow.



Thursday 19 May 2011

NetLogic Microsystems selects Helic’s tools for RF IC design flow


Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design proudly announces that NetLogic Microsystems selected Helic’s VeloceRF™ and VeloceRaptor/X™ to be part of their RFIC design flow.



Friday 06 May 2011

Helic to sponsor and participate in Job Fair Athens 2011


Helic Inc., the technology leader in EDA solutions for RF and high-speed IC design, will sponsor and participate in the first Job Fair Athens 2011. The event will take place on Wednesday, June 8th, 2011 in Athens, at Technopolis.



Thursday 10 June 2010

Helic and TSMC collaborate on 65nm RF Reference Design Kit 2.0

Helic's VeloceRF validated by TSMC for inductor synthesis and extraction in RF RDK 2.0

Helic Inc., the technology leader in inductor synthesis and extraction solutions for RF and high-speed IC design, today announced that TSMC 65nm RF Reference Design Kit 2.0 uses its VeloceRF™ toolset for spiral inductor synthesis, modeling and EM parasitics annotation.



Sunday 06 June 2010

Visit Helic at DAC 2010

Visit Helic at DAC 2010, Booth #1450 and TSMC Open Innovation Forum Booth #294, Anaheim Convention Center, June 14-16 2010

Helic, Inc., the technology leader in inductor synthesis and extraction solutions for Analog/RF and high-speed IC design welcomes you to visit our booth at DAC and attend live demos of Helic’s latest product releases.



Monday 17 May 2010

Helic launches Designers’ Forum

Helic takes the initiative to bring closer the Design and the EDA communities in an effort to better shape the tools of tomorrow

SAN FRANCISCO, CA May 19, 2010 — Helic Inc., the technology leader in inductor synthesis and extraction solutions for RF and high-speed IC design, has created a Designer’s Forum hosted in its website at http://www.helic.com/forum.



Monday 14 September 2009

Helic’s VeloceRF™ Qualified by TSMC for high-speed and RF design at 65nm

Helic's VeloceRF Passes TSMC's Electromagnetic (EM) Tool Qualification Program

SAN FRANCISCO, CA, Aug. 06, 2009 — Helic, Inc. today announced that TSMC has qualified its VeloceRF tool as part of TSMC’s Electromagnetic (EM) Tool Qualification Program. VeloceRF has been accuracy-certified against TSMC's 65nm silicon-verified spiral inductor set.



Wednesday 04 June 2008

ClariPhy leverages Helic’s VeloceRF™ EDA tool for first-pass success of CMOS 10G mixed-signal IC


IRVINE, Calif., and ATHENS, Greece, June 4, 2007 - ClariPhy Communications and Helic S.A. today announced details of their joint engineering collaboration over the past 12 months, which has been instrumental in the first-pass success of ClariPhy's single-chip, 10GBASE-LRM, mixed-signal CMOS transceiver. ClariPhy's transceiver features a low-power 10G Analog to Digital Converter (ADC) and a Maximum Likelihood Sequence Detection (MLSD) Electronic Dispersion Compensation (EDC) engine.




Wednesday 04 June 2008

Helic’s VeloceRF™ is selected by Fujitsu to build RFIC design flows for sub-100nm CMOS processes.


ATHENS, GREECE, June 4, 2007 - Helic S.A. proudly announces that Fujitsu Limited has adopted VeloceRF™ and Helic's technology to build a new design-flow for RFICs in its 90nm and 65nm CMOS processes. The parties have agreed to develop world-class tooling and design methodology to support rapid prototyping and volume production of high-frequency ICs applying advanced lithography techniques.




Thursday 20 July 2006

New release of VeloceRF™ supports 90-nm & 65-nm RFIC design


ATHENS, GREECE - Helic S.A. announces today the commercial availability of VeloceRF™ v1.5, featuring an enhanced Spiral Wizard™ inductor synthesizer, several improvements in its rapid RLCK modeling engine and new features addressing Design for Manufacturability (DFM) for 90-nm and 65-nm RFICs.




Monday 17 July 2006

AWR and Helic Partner to Offer VeloceRF Technology in Analog Office Software


EL SEGUNDO, Calif. and ATHENS, Greece - July 17, 2006 - Applied Wave Research, Inc. (AWR®) and Helic S.A. (Helic®) today announced a technology licensing agreement that enables the integration of Helic's VeloceRF™ whole-chip radio frequency (RF) extraction, modeling, and verification technology into AWR's Analog Office® RF integrated circuit (IC) design suite. The companies also announced a marketing agreement enabling AWR to market the solution through its worldwide distribution channels.




Wednesday 16 November 2005

Helic® and EdXact collaborate to boost RFIC design


ATHENS, Greece - GRENOBLE, France, November 16, 2005 - Helic S.A. and EdXact S.A. leading European EDA companies in modeling and verification, announce today a joint development that will result in an extension of Helic's VeloceRF™ inductance modeling, verification and synthesis tool. The new offering, called VRFJ™, will be based on EdXact's Jivaro™ netlist reduction technology.




Wednesday 08 June 2005

Micro Linear selects Helic’s VeloceRF™ for RFIC inductor synthesis modeling and verification


ATHENS, GREECE, June 8, 2005 – Helic S.A. proudly announces that another semiconductor company has selected its VeloceRF EDA product. Micro Linear Corporation (Nasdaq: MLIN), a leading digital wireless transceiver U.S. company, will be using VeloceRF for synthesis, modeling and verification of integrated inductors in its RFIC designs.




Monday 13 December 2004

Helic introduces unique new features in the VeloceRF™ toolset

Rapid, constraint-driven spiral synthesis accelerates and automates RFIC design

The Spiral Wizard™ module within VeloceRF v1.4.2 can rapidly and efficiently deliver spirals "to-order", tailored exactly to the designer's requirements in inductance, operating frequency and quality factor. The design process is significantly simplified and accelerated, as it is disentangled from the use of pre-characterized inductor libraries. The Spiral Wizard features on-the-fly layout synthesis, under an extensive set of constraints that make it possible to optimize inductor quality factor, shrink silicon real estate and minimize surrounding interconnect. Available within both schematic and layout environments, the interface is highly intuitive and extremely fast - even for complex spiral types such as differential and transformer, the Spiral Wizard will generate a solution in a few seconds.




Thursday 27 May 2004

Helic and Cadence Collaborate to Deliver RF Design Solution

PolyRadio RFIP to Serve as Wi-Fi Reference Design in Virtuoso Platform

ATHENS, GREECE - Helic S.A. announces a multi-faceted IP and EDA tools collaboration with Cadence Design Systems, Inc. in which both companies aim to become the springboard for the design of next-generation wireless semiconductor products. As part of the agreement, VeloceRF™, Helic's recently introduced tool for the rapid modeling and synthesis of on-chip and in-package inductances, becomes a third-party extension to the Virtuoso® custom design platform. Furthermore, Cadence licenses Helic's PolyRadio™ RFIP that will serve as a Wi-Fi reference design in the Virtuoso® platform, comprising RF silicon blocks such as a low-noise amplifier (LNA), fully-integrated power amplifier and voltage-controlled oscillator (VCO), linear direct-conversion mixers and programmable analog baseband circuitry. Helic's RFIP has already been fabricated and validated on a series of leading SiGe BiCMOS foundry processes.




Press Coverage

Friday 06 June 2008, 14:37 +02:00 GMT
EETimes

Helic launches tool for bondwire design



Saturday 17 June 2006, 14:40 +02:00 GMT
EETimes

AWR to integrate, sell Helic EDA software



Thursday 24 June 2004, 14:41 +02:00 GMT
Microwave Journal

Helic and Cadence join forces to deliver RF Design Solution



Thursday 27 May 2004, 14:42 +02:00 GMT
Electronic News

Cadence and Helic Team for RF Design



Monday 22 December 2003, 14:45 +02:00 GMT
EETimes

Inductance-modeling tool aims to ease RF design



Monday 08 December 2003, 14:46 +02:00 GMT
EETimes

Passive integration activates wireless



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